Design functionality can be
verified early in the design process. Design simulation at this higher level,
before implementation at the gate level, allows you to evaluate architectural
and design decisions. Coupling HDL Compiler with logic synthesis tools, you can
automatically convert an HDL description to a gate-level implementation in a
target technology.HDL descriptions provide technology independent documentation
of a design and its functionality. Since the initial HDL design description is
technology-independent, you can use it again to generate the design in a
different technology, without having to translate from the original technology.
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