Imagine design engineers needing
to hand draw millions of transistors in their schematic. The task was simply
impossible. A more efficient and productive method was needed to allow
designers to create schematics with large numbers of logic gates within a reasonable
timeframe. This lead to the development
of Hardware Description language (HDL). This new method allows a designer to
code the logic functionality of a circuit in HDL. The code is then synthesized
into logic gates using a synthesis tool.
The industry provides two languages for
hardware description
1.
VHSIC
Hardware description language
2.
Verilog Hardware description language
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